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  • GNStudios - Wednesday, September 27, 2006 - link

    Is Quad-core going to much faster than dual-core, like when core 2 duo came?

    Reply is appriciated. :-)
  • Niv KA - Wednesday, September 27, 2006 - link

    I have reasons to belive that whatever will come after Gesher will be very different from what we have today. Gesher is translated to brigde in Hebrew. Therefore I have reason to belive that what ever Gesher will be, it will be a transition to a new technology.

    I know I repeated myself a few times.

    -- Niv K Aharonovich
  • sprockkets - Wednesday, September 27, 2006 - link

    It used a Netburst and most likely a prescott core processor to operate WTF?

  • GhandiInstinct - Wednesday, September 27, 2006 - link

    The day, in a press conference, the day in which multi-code is mastered in software, that we see in a video game demo, a full fledged Torando tearing down a metropolis.
  • yacoub - Tuesday, September 26, 2006 - link

    Good coverage so far: Lots of pics, informative text between them, and lots of new tech incoming from Intel! woot
  • porkster - Tuesday, September 26, 2006 - link

    Any news on Santa Rosa chipsets? I couldn't see them in the road map.
  • porkster - Tuesday, September 26, 2006 - link

    Intel and Microsoft have no idea when it comes to what people will buy and can afford.

    Ye, like in the picture we are all going to buy 3 and 4 of these flop devices for our cars. Without these devices being under $200, no one will take then serious.

    It seems like anytime someone bring up a portable, they have to use an expensive cpu in it. I can't see why you can't jsut echo a wifi'ed screen from another computer at home or in the car. A device the is a terminal, not a separate computer.
  • mino - Tuesday, September 26, 2006 - link

    "Years ago Micron talked about equipping a chipset with an on-die L3 cache to help improve performance, and it's looking like Intel will be doing just that"

    IBM has it since 2002 ... ;)

    BTW it was the main reason IMB did not jump on Opteron so eagerly. They have a chipset hugely hugely superior to Itel's Truland since 2003. Game over period.

    That snoop cache is the thing which brought SC Nocona Xeons on par with SC Opterons in 4P-8P scenarios!!!

    First Intel DC Smithfield _IS_ single-die, it is just glued together but single-die. The reason being MCM puts huge strain on FSB so they put an arbitter on a glued chip, to help achieve even mediocre 800FSB on their chipsets of the time.
  • mino - Tuesday, September 26, 2006 - link

    "Years ago Micron talked about equipping a chipset with an on-die L3 cache to help improve performance, and it's looking like Intel will be doing just that"

    IBM has it since 2002 ... ;)

    BTW it was the main reason IMB did not jump on Opteron so eagerly. They have a chipset hugely hugely superior to Itel's Truland since 2003. Game over period.

    That snoop cache is the thing which brought SC Nocona Xeons on par with SC Opterons in 4P-8P scenarios!!!

    BTW First Intel DC Smithfield _IS_ single-die, it is just glued together but single-die. The reason being MCM puts huge strain on FSB so they put an arbitter on a glued chip, to help achieve even mediocre 800FSB on their chipsets of the time.
  • mino - Tuesday, September 26, 2006 - link

    screwed title, if posiible please delete/vote out. Thanks.
  • gersson - Tuesday, September 26, 2006 - link

    I would also like to make a generic statement
  • PeteRoy - Tuesday, September 26, 2006 - link

    Good to hear that there's still more to come.

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